1. Analysis
- Current cryptography: where classical algorithms are used and exposed to quantum threats
- Evaluate your target platform (FPGA, ASIC, MCU, SoC) for PQC readiness
Post Quantum Cryptography Integration Package
Turn PQC requirements into a concrete integration path for your target platform.
PQC is standardized, migration deadlines are approaching, and regulations like the Cyber Resilience Act demand stronger cryptography in embedded products. You know that you need to implement PQC.
But how does this impact your system?
Validate PQC on your target platform (FPGA, ASIC, MCU) before choosing a vendor or approach. Understand real resource cost, integration effort, and migration path based on your system.
We help you make a defensible PQC decision in weeks. So you can move forward with confidence.
Ready to start with PQC evaluation and integration on your target platform?
PQC Evalution and Integration Package
2. Prototyping
- ML-KEM / ML-DSA prototype on your target platform (SW or HW)
- Resource profiling: memory, LUT, BRAM, DSP, power
- Performance benchmarks: throughput, latency, key generation
3. Integration Decision
- HW vs. SW vs. hybrid PQC recommendation
- Integration concept (AXI4-Lite, HAL, drivers, API)
- Side-channel risk assessment and mitigation
4. Migration Path
- Prioritized migration roadmap
- Classical + PQC coexistence strategy
- Documentation for review and compliance
This is for you if
- You need to integrate PQC and do not know where to start
- You need to justify architectural decisions internally
- Your platform has tight resource or timing constraints
- You are unsure whether hardware acceleration is required
- You are preparing for CRA or IEC 62443 requirements
Why work with us
Make the right PQC decision for your embedded system.
Start from your embedded system
We analyze your hardware architecture (FPGA, MCU, ASIC), data paths, and constraints and derive the right approach from there.
PQC at system level
ML-KEM and ML-DSA impact memory, interfaces, latency, and protocols. We evaluate how PQC interacts with your stack (e.g. TLS, IPsec, secure boot), not just the primitive itself.
Measured on your target platform
No generic benchmarks. We assess resource usage, timing, and integration effort on your FPGA, MCU.
Clear technical outcome
You get a concrete recommendation: where to integrate PQC, how to implement it, and what trade-offs you are making.
No lock-in
If the right solution is not our IP, we will say it. The goal is a correct design decision, not a dependency.
Start with PQC evaluation and integration on your target platform.
PQC EVALUATION FOR INDUSTRIAL GATEWAY
PRODUCT
Industrial Gateway
CHALLENGE
The challenge was to evaluate whether post-quantum cryptography could be integrated into their existing AMD Zynq UltraScale+ based industrial gateway within tight FPGA resource constraints, without degrading performance or disrupting the established functional and data communciation architecture.
RESULTS
The result was a validated ML-KEM hardware prototype on the target FPGA, confirming resource fit and performance while providing a clear, data-driven roadmap for a phased migration to post-quantum cryptography
Our PQC IP Cores for FPGA and ASIC
KiviPQC-KEM
Supports ML-KEM algorithm.
Allows two parties to securely establish a shared secret over an untrusted channel. This secret is typically used as the basis for symmetric encryption.
KiviPQC-DSA
Supports ML-DSA algorithm.
Enables the creation of digital signatures to verify the origin of a message and protect it from undetected modifications.
KiviPQC-Box
Supports ML-KEM and ML-DSA algorithm.
Creates digital signatures and enables secure key exchange for encrypted communication.