KiviHash-SHA512/384
Secure Hash Algorithm IP Core
Cost-efficient licensing model
Low license fees based on one-time fee and free evaluation licenses make IP cores accessible even for projects with limited budgets.
Fast availability and direct support
Evaluation packages and documentation are available via download, with rapid responsive web support to keep your project moving.
Easy integration
AXI4-Lite interface, platform-agnostic C source code HAL, API and software driver and clear documentation enable fast integration into hardware–software co-design flows.
European technology
Developed in Germany, with predictable availability giving design teams transparency, control, and long-term planning security.
Experienced IP core providers
KiviCore’s employees bring more than 20 years of experience in IP core design and licensing of IP cores.
KiviHash-SHA512/384 Overview
KiviHash-SHA-512/384 is an IP core implementing the SHA-384, SHA-512 and SHA512/256 cryptographic algorithm, an one-way hash function compliant to NIST’s FIPS 180-4 standard. It is optimized for high speed designs and easy integration with any FPGA and ASIC designs. Automatic byte padding is included. It features a standard AMBA® AXI4-Lite interface for straightforward hardware integration and HAL, and software driver (C-code, platform independent) for simple software integration.
Key Features
- NIST FIPS 180-4 compliant
- Supports cryptographic hashing for SHA-384, SHA-512 and SHA512/256
- automatic padding
- High-speed design
- AMBA® AXI4-Lite
- Fully synchronous design
- HAL and software driver (C-code, platform independent)
- For any FPGA and ASIC
Tests and Verification
- NIST CAVS test vectors for SHA hash functions
- Extended verification through simulation
- FPGA integration and implementation tests
- Unity tests for driver and whole IP Core
Applications & Use Cases
- Firmware Updates: Detecting tampered or corrupted update packages
- FPGA bitstreams: Ensuring only trusted configurations are loaded
- Communication protocols: TLS, IPsec, MAC-based authentication
- External memory integrity: Protecting stored data in flash or external RAM
Technical documentation & evaluation package
Register for the Evaluation Portal to access evaluation packages, technical documentation and integration resources.
Licensing
Licensing & Deliverables
| License type | Purpose | Scope | Fee | Deliverables |
| Product License | Manufacture of products intended for commercial distribution. | Valid for single-instance implementation/synthesis into one device (e.g., one type of SoC, or FPGA) for a specific project or product definition. Multiple instantiations refer to the physical realization of one IP core multiple times in one device. | One-time fee |
|
| Evaluation License | Usability and evaluation for upcoming design | Valid for single-instance implementation/synthesis into one device (SoC, or FPGA) for a specific upcoming design project. | Free, no license fee |
|
Support and Maintenance
-
Maintenance and updates of IP core included
- Rapid bug fix cycles
- Documentation and integration examples included
- Web based support with response times of 8 hours (Mo to Fri)
FPGA Implementation Results
AMD (Xilinx) Implementation Results
|
Device
|
LUTs |
max. Frequency (MHz) |
max. Throughput (Gbps) |
|
Spartan 7 |
3415 | 157.3 | 2.52 |
|
Kintex 7 |
3418 | 267.5 | 4.28 |
|
Zynq US+ MPSoC |
3505 | 361.8 | 5.79 |
|
Versal AI Cores Series |
3210 | 446.4 | 7.14 |
Efinix Implementation Results
|
Device
|
XLR |
max. Frequency (MHz) |
max. Throughput (Gbps) |
|
Titanium |
6018 | 285.1 | 4.56 |
|
Topaz |
6018 | 198.7 | 3.18 |
|
Trion |
6018 | 79.3 | 1.27 |