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KiviPQC-KEM - Post-Quantum Key Encapsulation IP Core

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PQC-light
Security by Design
A self-contained engine with a minimal attack surface.
Money
Highly cost-efficient

Post-Quantum IP Core that ensures excellent performance with low purchasing costs.

Target
Ressource-efficient

IP core designed to have minimal logic utilization.

KiviPQC-KEM Overview 

The KiviPQC-KEM is an IP core implementing the ML-KEM (Module-Lattice-based Key Encapsulation Mechanism) a post-quantum cryptographic standard defined by NIST FIPS 203. Engineered to withstand both classical and quantum computer attacks, ML-KEM enables two parties to securely establish a shared secret key over an untrusted public channel.

Supporting all ML-KEM parameter sets, the KiviPQC-KEM enables:

  • Two parties to securely establish a shared secret key over an untrusted public channel that creates the foundation for encrypted communication

The IP core provides dedicated hardware acceleration for the most computationally demanding operations, ensuring high throughput and low latency while keeping the logic footprint compact. Designed as a standalone, self-contained module, KiviPQC-KEM can be seamlessly integrated into any SoC design for ASIC or FPGA, and features an AMBA® hardware interface for straightforward system integration. 

Version Description
KiviPQC-KEM-Tiny

Optimized for minimal logic resource usage.

KiviPQC-KEM-Fast 

Optimized for fast processing

 

Key Features

  • NIST FIPS 203 compliant
  • Supports ML-KEM 512/768/1024 parameter sets
  • Supports ML-KEM.KeyGen, ML-KEM.Encaps, ML-KEM.Decaps functions
  • Self-contained engine with a minimal attack surface
  • Hardware offloading and acceleration for ML-KEM operations
  • Protection against timing-based side channel attacks
  • AMBA® AXI4-Lite Interface
  • Seamlessly integrate into target system
  • For any FPGA and ASIC

Applications

  •  Quantum-Resistant Networks
  •  Public Key Infrastructures
  •  Network Security: MACsec, IPsec
  •  Transport Protocols: TLS, SSL
  •  Secure Communications
  •  Electronic Transactions

Product Specifications

Deliverables
  • System Verilog RTL Source Code
  • Testbenches
  • Integration examples
  • Software HAL & driver source code
  • Software example source code
  • Documentation
Licensing & Product Services
  • One-time license fee for single/multi project 
  • Evaluation licences available
  • Technical Support by email
  • Maintenance & updates of IP cores