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KiviPQC-Box - Post-Quantum Key Encapsulation and Digital Signature IP Core

Customized
Easy integration
Saves time and effort: Ready to use hardware and software integration.
Money
Highly cost-efficient

Saves costs: Post-Quantum IP Core with low licensing costs and free evaluation licences.

Target
Minimal logic utilization

Saves resources: Designed and optimized for area-constrained devices. 

KiviPQC-Box Overview 

The KiviPQC-Box is an IP core that combines the algorithms ML-DSA and ML-KEM into one single package. ML-DSA and ML-KEM are algorithms that are standardized by NIST as post-quantum algorithms defined in NIST FIPS 204 and NIST FIPS 203 and provide cyber secure protection against the threat of quantum computers. ML-KEM enables two parties to securely establish a shared secret key over an untrusted public channel and ML-DSA ensures the authenticity and integrity of signed data far into the future. It delivers complete protection against time-based side-channel attacks (SCA).

 With both algorithms implemented in KiviPQC-Box you can:

  • Generate digital signatures to verify data integrity and detect any unauthorized modifications of signed data
  • Ensure authenticity by proving that a digital signature was created by the stated signer (non-repudiation).
  • Securely establish a shared secret key over an untrusted public channel that creates the foundation for encrypted communication

The KiviPQC-Box is a self-contained, standalone module that integrates effortlessly into any SoC design. It includes a standard AMBA® AXI4-Lite interface for easy hardware integration and provides platform-independent C code, HAL, and API drivers to simplify software integration with the host processor.

Version Description
KiviPQC-Box-Tiny 

Optimized for minimal logic resource usage, thanks to a sequential architecture. Ideal when FPGA resources or power budgets are tight.
KiviPQC-Box-Fast

Optimized for fast processing. For designs that desire higher performance while maintaining efficient resource utilization. 

 

Key Features

  • NIST FIPS 203 and FIPS 204 compliant
  • Supports ML-KEM 512/768/1024 parameter sets
  • Supports ML-DSA 44/65/87 parameter sets
  • Supports ML-DSA.KeyGen, ML-DSA.Sign, ML-DSA.Verify functions
  • Supports pre-hash ML-DSA functions HashML-DSA.Sign and HashML-DSA.Verify
  • Supports hedged and deterministic signing
  • Supports context string
  • Supports ML-KEM.KeyGen, ML-KEM.Encaps, ML-KEM.Decaps functions
  • Hardware offloading and acceleration for ML-KEM and ML-DSA operations
  • Protection against timing-based side channel attacks

Easy integration

  • Platform agnostic design for any FPGA
  • AMBA® AXI4-Lite Interface
  • Platform agnostic C-Source Code
  • HAL, API and Software drivers included
  • Software examples included
  • Software User Guide included
  • Fast support response within 8 hours

Applications

  •  Quantum-Resistant Networks
  •  Public Key Infrastructures
  •  Network Security: MACsec, IPsec
  •  Transport Protocols: TLS, SSL
  •  Secure Communications
  •  Electronic Transactions

Product Information

Licensing & Deliverables
Strich-2-thick
License type Purpose Scope Fee Deliverables
Product License Manufacture of products intended for commercial distribution. Valid for single-instance implementation/synthesis into one device (e.g., one type of SoC, or FPGA) for a specific project or product definition. Multiple instantiations refer to the physical realization of one IP core multiple times in one device. Product licenses for IP Cores include volume caps of 10,000 units for FPGAs. One-time fee 
  • System Verilog RTL Source Code or Netlist format
  • Testbenches
  • Integration examples
  • Software HAL & driver source code
  • Software example
  • Documentation
Evaluation License Evaluation for upcoming design  Valid for single-instance implementation/synthesis into one device (SoC, or FPGA) for a specific upcoming design project. Free, no license fee
  • Netlist format, time-bombed
  • Testbenches
  • Integration examples
  • Software HAL & driver source code
  • Software example
  • Documentation
Support and Maintenance
Strich-2-thick
  • Maintenance & updates of IP cores included
  • Rapid update/bug fix cycles
  • Integration support: Comprehensive documentation and integration examples 
  • Web-based support with response times within 8 hours (Mo-Fri)

FPGA Implementation Results

 

Altera Implementation Results

KiviPQC-Box-Tiny KiviPQC-Box-Fast
Device

ALM

Frequency (MHz)

 ALM

Frequency (MHz)

Stratix 10

3190

148.2

 11149 155.5

Agilex 7

3050

212.2

 11036 212.6

Arria 10

2746

207.0

 10357 207.2

Cyclone 10 GX

2753

184.8

 10339 179.5

 

AMD (Xilinx) Implementation Results

KiviPQC-Box-Tiny KiviPQC-Box-Fast
Device
 LUTs

Frequency (MHz)

 LUTs

Frequency (MHz)

Spartan 7

 3912 76.5 12387 78.3

Kintex 7

 3946 128.5 12365 128.2

Zynq US+ MPSoC

 3874 205.2 12341 198.3

Versal AI Cores Series

 5912 202.6 14999 206.1

 

Microchip Implementation Results

KiviPQC-Box-Tiny KiviPQC-Box-Fast
Device
 LUT4

Frequency (MHz)

 LUT4

Frequency (MHz)
PolarFire SoC 6301 67.0 19470 64.5
PolarFire 6301 67.0 19470 64.5
Igloo2 6242 50.9 18729 49.8
RTG4 7915 42.3 20521 43.5
SmartFusion 2 6242 50.9 18729 49.8

 

 

Efinix Implementation Results

KiviPQC-Box-Tiny KiviPQC-Box-Fast
Device
 XLR

Frequency (MHz)

 XLR

Frequency (MHz)

Titanium

 6476 137.2 17090 146.3