KiviBoot
Secure Boot Solution for FPGA systems
Establishes a chain of trust from the protected FPGA configuration to application firmware.
Integrate security hardware IP and secure boot software with clear interfaces, comprehensive documentation and direct support from our engineers.
Secure Boot Solution for FPGA systems
Establishes a chain of trust from the protected FPGA configuration to application firmware.
Post-Quantum-Cryptography IP Cores
Support quantum-secure key establishment and digital signatures for quantum-safe systems.
Hash and Authentication IP cores
Supports hashing and message authentication.
Encryption IP Cores
Hardware IP cores for authenticated encryption and data protection.
KiviBoot extends the hardware-established chain of trust to bootloaders and application firmware. Its portable two-stage architecture can be adapted to FPGA SoCs and softcore processor systems, memory configurations and application-specific security requirements.
Software only secure boot
Designed for systems where FPGA resources are limited and software-based boot performance is sufficient.
FPGA-accelerated secure boot
Combines the KiviBoot software stages with AES and SHA hardware accelerators in the FPGA fabric.
Secure boot for Linux systems
Extends the multi-stage KiviBoot architecture towards the Linux boot environment.
Evaluating cryptographic IP or embedded software is often difficult. Long time to complete NDAs, delayed deliveries, and incomplete documentation slow down technical decision-making. KiviCore addresses this with its Evaluation Portal.
You can access evaluation packages for software and IP cores for various FPGA platforms. Each IP core package includes FPGA netlist, testbenches, integration examples, HAL, API and software driver in C source code.
You will find the design specification, a software user guide, a demo guide and an implementation manual for each IP core. For software products you will find comprehensive docs.
Our whole portfolio is available on the portal. Our IP cores are designed to be platform-independent and can be made available for all FPGAs.
Via the portal, you can access our web support, ask questions about the IP cores and products and receive support for the evaluation packages supplied.
Low license fees based on one-time fee and free evaluation licenses make IP cores and software solutions accessible even for projects with limited budgets.
Evaluation packages and documentation are available via download, with rapid responsive web support to keep your project moving.
AXI4-Lite interface, platform-agnostic C source code HAL, API and software driver and clear documentation enable fast integration into hardware–software co-design flows.
Developed in Germany, with predictable availability giving design teams transparency, control, and long-term planning security.
KiviCore’s employees bring many years of experience in IP core design and licensing of IP cores.
Supports ML-KEM algorithm a key encapsulation mechanism.
It acts as a secure handshake to agree on a shared secret across an untrusted network.
Supports ML-DSA algorithm.
Enables the creation of digital signatures to verify the origin of a message and protect it from undetected modifications.
Supports ML-KEM and ML-DSA algorithm.
Creates digital signatures and enables secure key exchange for encrypted communication.
Supports SHA-3 hash functions SHA-3-224, SHA-3-256, SHA-3-384, SHA-3-512 and extendable output functions (XOF), SHAKE-128 and SHAKE-256. It is compliant to NIST´s FIPS 202 standard.
Supports SHA-256 cryptographic algorithm.
It is a one-way hash function compliant to NIST’s FIPS 180-4 standard.
Supports SHA-512/384 cryptographic algorithm.
It is a one-way hash function compliant to NIST’s FIPS 180-4 standard.
Supports secure Keyed-Hash Message Authentication Code (HMAC) generation using the SHA-256 algorithm. It is compliant to NIST FIPS 198-1 and NIST SP 800-224.
Supports secure Keyed-Hash Message Authentication Code (HMAC) generation using the SHA-512 algorithm. It is compliant to NIST FIPS 198-1 and NIST SP 800-224.
Supports the Advanced Encryption Standard (AES) in Galois Counter Mode (GCM) with key sizes of 128, 192, and 256 bits, with a standard IV length of 96 bits. It can operate either with a pre-expanded key or with an internal key expansion mechanism. It is compliant to NIST´s SP800-38D standard.